Adlink Express-HL2 Bedienungsanleitung

Express-HL2 User’s Manual Manual Revision: 1.01 Revision Date: October 22, 2014 Part Number: 50-1J058-1010

Page 10 Express-HL2 2.15 Function Diagram

Express-HL2 Page 11 2.16 Mechanical Drawing connector onbottom sideAll tolerances ± 0.05 mmOther tolerances ± 0.2 mm

Page 12 Express-HL2 3 Pinouts and Signal Descriptions 3.1 AB / CD Pin Definitions The Express-HL2 is a Type 2 module supporting PCI and PATA on t

Express-HL2 Page 13 A39 USB4- B39 USB5- C39 PCI_AD17 D39 PCI_AD20 A40 USB4+ B40 USB5+ C40 PCI_AD19 D40 PCI_AD22 A41 GND (FIXED) B41

Page 14 Express-HL2 A89 PCIE0_CK_REF- B89 VGA_RED C89 PEG_RX11- D89 PEG_TX11- A90 GND (FIXED) B90 GND (FIXED) C90 GND (FIXED)

Express-HL2 Page 15 3.2 Signal Description Terminology The following terms are used in the COM Express AB/CD Signal Descriptions below. I Inpu

Page 16 Express-HL2 3.3 AB Signal Descriptions 3.3.1 Audio Signals Signal Pin # Description I/O PU/PD Comment AC_RST# / HDA_RST# A30 Reset

Express-HL2 Page 17 3.3.3 LVDS Signal Pin # Description I/O PU/PD Comment LVDS_A0+ LVDS_A0- LVDS_A1+ LVDS_A1- LVDS_A2+ LVDS_A2- LVDS_A3

Page 18 Express-HL2 3.3.5 Serial ATA *Note: SATA1 port not supported by HM86 chipset. Signal Pin # Description I/O PU/PD Comment SATA0_TX+

Express-HL2 Page 19 3.3.6 PCI Express Signal Pin # Description I/O PU/PD Comment PCIE_TX0+ PCIE_TX0- A68 A69 PCI Express channel 0, Transmit

Page 2 Express-HL2 Revision History Revision Description Date By 1.00 Initial release 2014-08-29 JC 1.01 Add BIOS beep codes; correct PCIe C

Page 20 Express-HL2 3.3.9 USB Signal Pin # Description I/O PU/PD Comment USB0+ USB0- A46 A45 USB differential data pairs for Port 0 I/O 3.3V

Express-HL2 Page 21 3.3.10 USB Root Segmentation

Page 22 Express-HL2 3.3.11 SPI (BIOS only) Signal Pin # Description I/O PU/PD Comment SPI_CS# B97 Chip select for Carrier Board SPI BIOS F

Express-HL2 Page 23 3.3.14 I2C Bus Signal Pin # Description I/O PU/PD Comment I2C_CK B33 General purpose I²C port clock output/input I/O O

Page 24 Express-HL2 3.3.17 Power and System Management Signal Pin # Description I/O PU/PD Comment PWRBTN# B12 Power button to bring system

Express-HL2 Page 25 3.4 CD Signal Descriptions 3.4.1 PATA IDE Signal Pin # Description I/O PU/PD Comment IDE_D0 IDE_D1 IDE_D2 IDE_D3 IDE_D4

Page 26 Express-HL2 Signal Pin # Description I/O PU/PD Comment PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20

Express-HL2 Page 27 Signal Pin # Description I/O PU/PD Comment PCI_IRQB# PCI_IRQC# PCI_IRQD# C50 D46 D47 3.3V PCI_CLK D50 PCI 33MHz clock ou

Page 28 Express-HL2 4 Connector Pinouts on Module This chapter describes connectors and pinouts, LEDs and switches that are used on the module bu

Express-HL2 Page 29 4.1 40-pin Debug Connector ¾ FPC Connector Type: FCI 59GF Flex 10042867 ¾ Pin Orientation ¾ Express-HL2 and the Debug Mo

Express-HL2 Page 3 Preface Copyright 2014 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All right

Page 30 Express-HL2 ¾ 40-pin Debug Connector Pin Definition on the COM Express Module Pin Interface Signal Remark Pin Interface Signal

Express-HL2 Page 31 4.2 Status LEDs To facilitate easier maintenance, status LEDs are mounted on the board. ¾ LED Descriptions Name Color Conn

Page 32 Express-HL2 4.3 XDP Debug header The debug port is a connection into a target-system environment that provides access to JTAG, run control

Express-HL2 Page 33 4.4 Fan Connector ¾ Connector Type: JVE 24W1125A-04M00 ¾ Pin Assignment Name Signal Description 1 BMC_FAN_OUT FAN_PWMOUT

Page 34 Express-HL2 4.6 Express-HL2 Switch Settings 4.6.1 Switch Locations

Express-HL2 Page 35 4.6.2 SW1: PCI Express Configuration Switch Switch SW1 allows you to configure the PCI Express x16 lanes from the CPU as 1 PCI

Page 36 Express-HL2 4.7 PCIe x16-to-two-x8 Adapter Card The Express-HL can be used with the PCIe x16-to-two-x8 Adapter Card on the Express-BASE6 R

Express-HL2 Page 37 5 Smart Embedded Management Agent (SEMA) The onboard microcontroller (BMC) implements power sequencing and Smart Embedded Mana

Page 38 Express-HL2 5.1 Board Specific SEMA Functions 5.1.1 Voltages The BMC of the Express-HL2 implements a voltage monitor and samples several

Express-HL2 Page 39 5.1.4 Exception Codes In case of an error, the BMC drives a blinking code on the blue Status LED (LED1). The same error code i

Page 4 Express-HL2 Table of Contents Revision History ...

Page 40 Express-HL2 6 System Resources 6.1 System Memory Map Address Range (decimal) Address Range (hex) Size Description (4GB-2MB) FFE00000

Express-HL2 Page 41 6.3 I/O Map Hex Range Device 000-01F DMA controller 1, 8237A-5 equivalent 020-02D and 030-03F Interrupt controller 1, 8259

Page 42 Express-HL2 I/O Map (cont'd) Hex Range Device 3BC-3BE Reserved for parallel port 3C0-3DF VGA registers 3E0-3EF Available 3F0-3F7 Fl

Express-HL2 Page 43 6.4 Interrupt Request (IRQ) Lines PIC Mode IRQ# Typical Intterupt Resource Connected to Pin Available 0 Counter 0 N/A No

Page 44 Express-HL2 APIC Mode (cont'd) IRQ# Typical Intterupt Resource Connected to Pin Available 16 N/A Intel HDA, PCIE Port 0/1/2/3/4/5

Express-HL2 Page 45 6.5 PCI Configuration Space Map Bus Number Device Number Function Number Routing Description 00h 00h 00h N/A Intel host

Page 46 Express-HL2 6.6 PCI Interrupt Routing Map INT Line P.E.G Root Port Audio Controller ME Controller #1 GbEt Controller HDA Controller PCIE

Express-HL2 Page 47 7 BIOS Setup 7.1 Menu Structure This section presents the six primary menus of the BIOS Setup Utility. Use the following tab

Page 48 Express-HL2 7.2 Main The Main Menu provides read-only information about your system and also allows you to set the System Date and Time. R

Express-HL2 Page 49 7.2.4 System Management 7.2.4.1 System Management > Board Information Board Information Info only SMC Firmware Read on

Express-HL2 Page 5 5 Smart Embedded Management Agent (SEMA) ... 37 5.1 Board Specific SEMA Functions

Page 50 Express-HL2 Feature Options Description AIN0 Read only Display actual voltage of AIN0 V3.30 Read only Display actual voltage of

Express-HL2 Page 51 7.2.4.6 System Management > Power Up Feature Options Description Power Up Info only Power Up watchdog Attention: F1

Page 52 Express-HL2 7.2.5 System Date and Time Feature Options Description System Date Weekday, MM/DD/YYYY Requires the alpha-numeric ent

Express-HL2 Page 53 7.3 Advanced This menu contains the settings for most of the user interfaces in the system 7.3.1 CPU Feature Options De

Page 54 Express-HL2 Feature Options Description Enabled CPU C3 Report Disabled Enabled Enable/Disable CPU C3 report to OS. CPU C6 Report Di

Express-HL2 Page 55 7.3.3 Graphics Feature Options Description Graphics Configuration Info only IGFX VBIOS Version Info only Display VB

Page 56 Express-HL2 Feature Options Description LCD Panel Type VBIOS Default 640X480 800X600 1024X768 1280X1024 1400X1050 1600X1200 1366X768

Express-HL2 Page 57 Feature Options Description Gen3 Intel ® Rapid Start Technology Submenu SATA Port Configuration Submenu Software Fea

Page 58 Express-HL2 7.3.4.2 SATA > SATA Port Configuration (IDE) Feature Options Description SATA Port Configuration Info only Serial A

Express-HL2 Page 59 Feature Options Description Enabled faster enumeration. USB Port #0~13 Disabled Enabled Control each of the USB ports (0~

Page 6 Express-HL2 1 Introduction The Express-HL2 is a COM Express® COM.0 R2.1 Type 2 module supporting the 64-bit 4th Generation Intel® Core™ i7/

Page 60 Express-HL2 7.3.7 PCI and PCIe Feature Options Description PCI Common Settings Info only PCI Latency Timer 32 PCI Bus Clocks 64

Express-HL2 Page 61 Feature Options Description Restore PCIE Registers Enabled Disabled On non-PCI Express aware OS's (Pre Windows Vis

Page 62 Express-HL2 7.3.7.2 PCI and PCIe > PCH-PCIe Configuration Feature Options Description PCH-PCIe Configuration Info only PCI Expr

Express-HL2 Page 63 Feature Options Description SECE Disabled Enable Enable/Disable Root PCI Express System Error on Correctable Error. PME

Page 64 Express-HL2 Feature Options Description Change Settings Auto IO=2F8h; IRQ=3 IO=3F8h; IRQ=3,4,5,6,7,10,11,12 IO=2F8h; IRQ=3,4,5,6,7,1

Express-HL2 Page 65 7.3.10 Sound Feature Options Description Sound Info only Azalia Disabled Enabled Auto Control Detection of the Azalia de

Page 66 Express-HL2 Feature Options Description Data Bits 7 8 Select Data Bits. Parity None Even Odd Mark Space Select Parity. Stop Bits

Express-HL2 Page 67 7.3.13 Thermal Feature Options Description Thermal Info only Automatic Thermal Reporting Enabled Disabled Configure _CR

Page 68 Express-HL2 Feature Options Description GPIO Lock Enabled Disabled Enable or Disable the GPIO lockdown BIOS Interface Lock Enabled D

Express-HL2 Page 69 7.4 Boot 7.4.1 Boot Configuration Feature Options Description Boot Configuration Info only Setup Prompt Timeout 1 En

Express-HL2 Page 7 2 Specifications 2.1 Core System ¾ CPU: 4th Generation Intel® Core™ and Intel® Celeron® Processors - 22nm (formerly “Haswell”

Page 70 Express-HL2 7.5 Security 7.5.1 Password Description Feature Options Description Administrator Password Enter password User Passw

Express-HL2 Page 71 8 BIOS Checkpoints, Beep Codes This section of this document lists checkpoints and beep codes generated by AMI Aptio BIOS. The

Page 72 Express-HL2 8.1 Status Code Ranges Status Code Range Description 0x01 – 0x0F SEC Status Codes & Errors 0x10 – 0x2F PEI executio

Express-HL2 Page 73 8.2.2 SEC Beep Codes None 8.2.3 PEI Status Codes Status Code Description Progress Codes 0x10 PEI Core is started 0x11

Page 74 Express-HL2 Status Code Description 0x4F DXE IPL is started PEI Error Codes 0x50 Memory initialization error. Invalid memory type

Express-HL2 Page 75 8.2.4 PEI Beep Codes # of Beeps Description 1 Memory not Installed 1 Memory was installed twice (InstallPeiMemory rou

Page 76 Express-HL2 Status Code Description 0x77 South Bridge DXE Initialization (South Bridge module specific) 0x78 ACPI module initializa

Express-HL2 Page 77 Status Code Description 0xAF Exit Boot Services event 0xB0 Runtime Set Virtual Address MAP Begin 0xB1 Runtime Set V

Page 78 Express-HL2 8.2.7 ACPI/ASL Checkpoint Status Code Description 0x01 System is entering S1 sleep state 0x02 System is entering S2 sl

Express-HL2 Page 79 9 Mechanical Information 9.1 Board-to-Board Connectors To allow for different stacking heights, the receptacles for COM Expre

Page 8 Express-HL2 2.5 LAN ¾ Integrated: LAN MAC integrated in PCH QM87/HM86 ¾ Intel PHY: Intel® Ethernet Controller i217LM ¾ Interface: 10/100

Page 80 Express-HL2 9.2 Thermal Solution 9.2.1 Heat Spreaders The function of the heat spreader is to ensure an identical mechanical profile for

Express-HL2 Page 81 Step 4: Use the four M2.5, L=6mm screws provided to fasten the heatsink to the module. Step 5: Place the COM Express modu

Page 82 Express-HL2 9.3 Mounting Methods There are several standard ways to mount the COM Express module with a thermal solution onto a carrier bo

Express-HL2 Page 83 9.4 Standoff Types The standoffs available for Top and Bottom mounting methods are shown below. Note that threaded standoffs a

Page 84 Express-HL2 Safety Instructions Read and follow all instructions marked on the product and in the documentation before you operate your sys

Express-HL2 Page 85 Getting Service ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan Tel:

Page 86 Express-HL2 ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel:

Express-HL2 Page 9 2.10 Power Specifications ¾ Power Modes: AT and ATX mode (AT mode start controlled by SEMA) ¾ Standard Voltage Input: AT