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56 Operation Theory

4.6 Timing Signals

In order to meet the requirements for user-specific timing or syn-

chronizing multiple boards, the DAQ-/DAQe-/PXI-2502/2501 card

provides a flexible interface for connecting timing signals with

external circuitry or other boards. The DAQ timing of the DAQ-/

DAQe-/PXI-2502/2501 card is composed of a bunch of counters

and trigger signals in the FPGA on board.

There are seven timing signals related to the DAQ timing, which in

turn influence the A/D, D/A process, and GPTC operation. These

signals are fed through the Auxiliary Function Inputs pins (AFI) or

the System Synchronization Interface bus (SSI). We implemented

a multiplexer in the FPGA to select the desired timing signal from

these inputs as shown in the Figure 4-31.

You can use the SSI to achieve synchronization between multiple

boards, or use the AFI to derive timing signals from an external

timing circuit.

Figure 4-31: DAQ Signals Routing

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