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Express-HL
User’s Manual
Manual Revision: 2.04
Revision Date: May 7, 2015
Part Number: 50-1J046-1040
Seitenansicht 0
1 2 3 4 5 6 ... 88 89

Inhaltsverzeichnis

Seite 1 - Express-HL

Express-HL User’s Manual Manual Revision: 2.04 Revision Date: May 7, 2015 Part Number: 50-1J046-1040

Seite 2 - Revision History

Page 10 Express-HL 2.15 Function Diagram

Seite 3 - Preface

Express-HL Page 11 2.16 Mechanical Drawing

Seite 4 - Table of Contents

Page 12 Express-HL 3 Pinouts and Signal Descriptions 3.1 AB / CD Pin Definitions The Express-HL is a Type 6 module supporting USB3.0 and DDI chan

Seite 5 - Express-HL Page 5

Express-HL Page 13 Row A Row B Row C Row D Pin Name Pin Name Pin Name Pin Name A36 USB6- B36 USB7- C36 DDI3_CTRLCLK_AUX+ D36 DDI1_PAIR3+

Seite 6 - 1 Introduction

Page 14 Express-HL Row A Row B Row C Row D Pin Name Pin Name Pin Name Pin Name A81 LVDS_A_CK+ B81 LVDS_B_CK+ C81 PEG_RX9+ D81 PEG_TX9+ A

Seite 7 - 2 Specifications

Express-HL Page 15 3.2 Signal Description Terminology The following terms are used in the COM Express AB/CD Signal Descriptions below. I Input

Seite 8

Page 16 Express-HL 3.3 AB Signal Descriptions 3.3.1 Audio Signals Signal Pin # Description I/O PU/PD Comment AC_RST# / HDA_RST# A30 Reset o

Seite 9 - 2.14 Operating Systems

Express-HL Page 17 3.3.3 LVDS Signal Pin # Description I/O PU/PD Comment LVDS_A0+ LVDS_A0- LVDS_A1+ LVDS_A1- LVDS_A2+ LVDS_A2- LVDS_A3+

Seite 10 - 2.15 Function Diagram

Page 18 Express-HL 3.3.5 Serial ATA Signal Pin # Description I/O PU/PD Comment SATA0_TX+ SATA0_TX- A16 A17 Serial ATA channel 0, Transmit

Seite 11 - 2.16 Mechanical Drawing

Express-HL Page 19 3.3.6 PCI Express Signal Pin # Description I/O PU/PD Comment PCIE_TX0+ PCIE_TX0- A68 A69 PCI Express channel 0, Transmit

Seite 12 - 3.1 AB / CD Pin Definitions

Page 2 Express-HL Revision History Revision Description Date By 2.00 Initial release 2014-01-20 JC 2.01 Add PCH HM86 for Celeron CPUs; updat

Seite 13 - Express-HL Page 13

Page 20 Express-HL 3.3.9 USB Signal Pin # Description I/O PU/PD Comment USB0+ USB0- A46 A45 USB differential data pairs for Port 0 I/O 3.3VS

Seite 14

Express-HL Page 21 3.3.10 USB Root Segmentation

Seite 15

Page 22 Express-HL 3.3.11 SPI (BIOS only) Signal Pin # Description I/O PU/PD Comment SPI_CS# B97 Chip select for Carrier Board SPI BIOS Fl

Seite 16 - 3.3 AB Signal Descriptions

Express-HL Page 23 3.3.14 I2C Bus Signal Pin # Description I/O PU/PD Comment I2C_CK B33 General purpose I²C port clock output/input I/O OD

Seite 17 - 3.3.4 Gigabit Ethernet

Page 24 Express-HL 3.3.17 Power And System Management Signal Pin # Description I/O PU/PD Comment PWRBTN# B12 Power button to bring system o

Seite 18 - 3.3.5 Serial ATA

Express-HL Page 25 3.4 CD Signal Descriptions 3.4.1 USB 3.0 extension Signal Pin Description I/O PU/PD Comment USB_SSRX0- USB_SSRX0+ C3 C4

Seite 19 - 3.3.8 LPC Bus

Page 26 Express-HL 3.4.3 DDI Channels DDI 1 Signal Pin Description I/O PU/PD Comment DDI1_PAIR0+ DDI1_PAIR0- DDI1_PAIR1+ DDI1_PAIR1- DDI1_PAI

Seite 20 - 3.3.9 USB

Express-HL Page 27 DDI 2 Signal Pin Description I/O PU/PD Comment DDI2_PAIR0+ DDI2_PAIR0- DDI2_PAIR1+ DDI2_PAIR1- DDI2_PAIR2+ DDI2_PAIR2- DDI2

Seite 21

Page 28 Express-HL 3.4.4 DDI to DP/HDMI Mapping Pin Pin Name DP HDMI / DVI D26 DDI1_PAIR0+ DP1_LANE0+ TMDS1_DATA2+ D27 DDI1_PAIR0- DP1_LANE0

Seite 22 - 3.3.13 SMBus

Express-HL Page 29 3.4.5 PCI Express Graphics x16 (PEG) Signal Pin Description I/O PU/PD Comment PEG_RX0+ PEG_RX0- PEG_RX1+ PEG_RX1- PEG_

Seite 23 - 3.3.14 I2C Bus

Express-HL Page 3 Preface Copyright 2014-15 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rig

Seite 24 - 3.3.18 Power and Ground

Page 30 Express-HL Signal Pin Description I/O PU/PD Comment PEG_TX15+ PEG_TX15- D101 D102 AC coupled on Module PEG_LANE_RV# D54 PCI Express

Seite 25 - 3.4 CD Signal Descriptions

Express-HL Page 31 4 Connector Pinouts on Module This chapter describes connectors and pinouts, LEDs and switches that are used on the module but

Seite 26 - 3.4.3 DDI Channels

Page 32 Express-HL 4.1 40-pin Debug Connector ¾ FPC Connector type: FCI 59GF Flex 10042867 ¾ Pin orientation ¾ Express-HL and the Debug Modu

Seite 27

Express-HL Page 33 ¾ 40-pin Pin Description on the COM Express Module Pin Interface Signal Remark Pin Interface Signal Remark 1 VCC_SPI_

Seite 28 - Page 28 Express-HL

Page 34 Express-HL 4.2 Status LEDs To facilitate easier maintenance, status LED’s are mounted on the board. ¾ LED Descriptions Name Color Con

Seite 29 - Express-HL Page 29

Express-HL Page 35 4.3 XDP Debug Header The debug port is a connection into a target-system environment that provides access to JTAG, run control,

Seite 30 - 3.4.7 Power and Ground

Page 36 Express-HL 4.4 Fan Connector ¾ Connector Type: JVE 24W1125A-04M00 ¾ Pin Assignment Name Signal Description 1 BMC_FAN_OUT FAN_PWMOUT 2

Seite 31

Express-HL Page 37 4.6 Express-HL Switch Settings 4.6.1 Switch Locations SW4SW1 SW3

Seite 32 - 4.1 40-pin Debug Connector

Page 38 Express-HL 4.6.2 SW1: PCI Express Configuration Switch Switch SW1 allows you to configure the PCI Express x16 lanes from the CPU as 1 PCIe

Seite 33

Express-HL Page 39 4.7 PCIe x16-to-two-x8 Adapter Card The Express-HL can be used with the PCIe x16-to-two-x8 Adapter Card on the Express-BASE6 Re

Seite 34 - 4.2 Status LEDs

Page 4 Express-HL Table of Contents Revision History ...

Seite 35 - 4.3 XDP Debug Header

Page 40 Express-HL 5 Smart Embedded Management Agent (SEMA) The onboard microcontroller (BMC) implements power sequencing and Smart Embedded Manag

Seite 36 - 4.4 Fan Connector

Express-HL Page 41 5.1 Board Specific SEMA Functions 5.1.1 Voltages The BMC of the Express-HL implements a voltage monitor and samples several on

Seite 37 - 4.6.1 Switch Locations

Page 42 Express-HL 5.1.4 Exception Codes In case of an error, the BMC drives a blinking code on the blue Status LED (LED1). The same error code is

Seite 38

Express-HL Page 43 6 System Resources 6.1 System Memory Map Address Range (decimal) Address Range (hex) Size Description (4GB-2MB) FFE00000 –

Seite 39

Page 44 Express-HL 6.3 I/O Map Hex Range Device 000-01F DMA controller 1, 8237A-5 equivalent 020-02D and 030-03F Interrupt controller 1, 8259 e

Seite 40

Express-HL Page 45 I/O Map (cont'd) Hex Range Device 3BC-3BE Reserved for parallel port 3C0-3DF VGA registers 3E0-3EF Available 3F0-3F7 Avai

Seite 41 - 5.1.3 BMC Status

Page 46 Express-HL 6.4 Interrupt Request (IRQ) Lines PIC Mode IRQ# Typical Intterupt Resource Connected to Pin Available 0 Counter 0 N/A No 1

Seite 42 - 5.1.5 BMC Flags

Express-HL Page 47 APIC Mode (cont'd) IRQ# Typical Intterupt Resource Connected to Pin Available 16 N/A Intel HDA, PCIE Port 0/1/2/3/4/5/

Seite 43 - 6 System Resources

Page 48 Express-HL 6.5 PCI Configuration Space Map Bus Number Device Number Function Number Routing Description 00h 00h 00h N/A Intel host B

Seite 44 - 6.3 I/O Map

Express-HL Page 49 6.6 PCI Interrupt Routing Map INT Line P.E.G Root Port Audio Controller xHCI Controller ME Controller #1 ME Controller #2 IDE-R

Seite 45 - I/O Map (cont'd)

Express-HL Page 5 5 Smart Embedded Management Agent (SEMA) ... 40 5.1 Board Specific SEMA Functions

Seite 46

Page 50 Express-HL 7 BIOS Setup 7.1 Menu Structure This section presents the six primary menus of the BIOS Setup Utility. Use the following table

Seite 47 - APIC Mode (cont'd)

Express-HL Page 51 7.2 Main The Main Menu provides read-only information about your system and also allows you to set the System Date and Time. Re

Seite 48 - Page 48 Express-HL

Page 52 Express-HL 7.2.3.1 PCH Information System Management Feature Options Description System Management Info only Version Info only

Seite 49 - 6.7 SMBus Slave Addresses

Express-HL Page 53 7.2.4.3 System Management > Power Consumption Feature Options Description Power Consumption Info only Current Input

Seite 50 - 7 BIOS Setup

Page 54 Express-HL 7.2.4.6 System Management > Power Up Feature Options Description Power Up Info only Power Up watchdog Attention: F12

Seite 51 - 7.2 Main

Express-HL Page 55 7.2.5 System Date and Time Feature Options Description System Date Weekday, MM/DD/YYYY Requires the alpha-numeric entry

Seite 52 - 7.2.4 System Management

Page 56 Express-HL 7.3 Advanced This menu contains the settings for most of the user interfaces in the system 7.3.1 CPU Feature Options Des

Seite 53

Express-HL Page 57 Feature Options Description CPU C3 Report Disabled Enabled Enable/Disable CPU C3 report to OS. CPU C6 Report Disabled E

Seite 54

Page 58 Express-HL 7.3.3 Graphics Feature Options Description Graphics Configuration Info only IGFX VBIOS Version Info only Display VBI

Seite 55 - 7.2.5 System Date and Time

Express-HL Page 59 Feature Options Description LCD Panel Type VBIOS Default 640X480 800X600 1024X768 1280X1024 1400X1050 1600X1200 1366X768 1

Seite 56 - 7.3 Advanced

Page 6 Express-HL 1 Introduction The Express-HL is a COM Express® COM.0 R2.1 Type 6 module supporting the 64-bit 4th Generation Intel® Core™ i7/i5

Seite 57 - 7.3.2 Memory

Page 60 Express-HL Feature Options Description Software Feature Mask Configuration Info only RAID0 Enabled Disabled Enable/Disable RAID0 f

Seite 58 - 7.3.3 Graphics

Express-HL Page 61 Feature Options Description Hot Plug Disabled Enabled Designates this port as Hot Pluggable. Mechanical Presence Disabled

Seite 59 - 7.3.4 SATA

Page 62 Express-HL 7.3.5.1 USB > PCH USB Configuration Feature Options Description USB Precondition Disabled Enabled Precondition work o

Seite 60 - Page 60 Express-HL

Express-HL Page 63 Feature Options Description PET Progress Enabled Disabled User can Enable/Disable PET Events progress to recieve PET event

Seite 61 - 7.3.5 USB

Page 64 Express-HL Feature Options Description Extended Synch Enabled Disabled If enabled the generation of PCI Express synchronization patt

Seite 62 - 7.3.6 Network

Express-HL Page 65 Feature Options Description Disable PEG RxCEM LoopBack Mode Disabled Enable Enabled/Disabled PEG RxCEM Loopback Mode.

Seite 63 - 7.3.7 PCI and PCIe

Page 66 Express-HL Feature Options Description CER Disabled Enable Enable/Disable PCI Express Device Correctable Error Reporting. CTO Disa

Seite 64 - Page 64 Express-HL

Express-HL Page 67 Feature Options Description Change Settings Auto IO=3F8h; IRQ=4 IO=3F8h; IRQ=3,4,5,6,7,10,11,12 IO=2F8h; IRQ=3,4,5,6,7,

Seite 65

Page 68 Express-HL 7.3.9 ACPI and Power Management Feature Options Description ACPI and Power Management Info only Enable ACPI Auto Configu

Seite 66 - 7.3.8 Super IO

Express-HL Page 69 7.3.11.1 Serial Port Console > Console Redirection Settings Feature Options Description Console Redirection Settings I

Seite 67 - Express-HL Page 67

Express-HL Page 7 2 Specifications 2.1 Core System ¾ CPU: 4th Generation Intel® Core™ and Celeron® Processors - 22nm (formerly known as "Ha

Seite 68 - 7.3.11 Serial Port Console

Page 70 Express-HL Feature Options Description Turn off unused PCI/PCIe clocks Disabled Enable Disabled: all clocks turned on. Enabled: cloc

Seite 69 - 7.3.12 Clock

Express-HL Page 71 Feature Options Description Trusted Computing Submenu Intel TXT(LT) Configuration Enabled Disabled Enables or Disable

Seite 70 - 7.3.14 Miscellaneous

Page 72 Express-HL 7.4 Boot 7.4.1 Boot Configuration Feature Options Description Boot Configuration Info only Setup Prompt Timeout 1 Ena

Seite 71 - Express-HL Page 71

Express-HL Page 73 7.5 Security 7.5.1 Password Description Feature Options Description Administrator Password Enter password User Passwor

Seite 72 - 7.4 Boot

Page 74 Express-HL 8 BIOS Checkpoints, Beep Codes This section of this document lists checkpoints and beep codes generated by AMI Aptio BIOS. The

Seite 73 - 7.6 Save & Exit

Express-HL Page 75 8.1 Status Code Ranges Status Code Range Description 0x01 – 0x0F SEC Status Codes & Errors 0x10 – 0x2F PEI execution

Seite 74

Page 76 Express-HL 8.2.2 SEC Beep Codes None 8.2.3 PEI Status Codes Status Code Description Progress Codes 0x10 PEI Core is started 0x11

Seite 75 - 8.2 Standard Status Codes

Express-HL Page 77 Status Code Description 0x4F DXE IPL is started PEI Error Codes 0x50 Memory initialization error. Invalid memory type o

Seite 76 - 8.2.3 PEI Status Codes

Page 78 Express-HL 8.2.4 PEI Beep Codes # of Beeps Description 1 Memory not Installed 1 Memory was installed twice (InstallPeiMemory rout

Seite 77 - Express-HL Page 77

Express-HL Page 79 Status Code Description 0x77 South Bridge DXE Initialization (South Bridge module specific) 0x78 ACPI module initializat

Seite 78 - 8.2.5 DXE Status Codes

Page 8 Express-HL 2.4 Audio ¾ Integrated: Intel® HD Audio integrated in PCH QM87/QM86 ¾ Audio Codec: Realtek ALC886 on Express-BASE6 2.5 LAN ¾

Seite 79 - Express-HL Page 79

Page 80 Express-HL Status Code Description 0xAF Exit Boot Services event 0xB0 Runtime Set Virtual Address MAP Begin 0xB1 Runtime Set Vi

Seite 80 - 8.2.6 DXE Beep Codes

Express-HL Page 81 8.2.7 ACPI/ASL Checkpoint Status Code Description 0x01 System is entering S1 sleep state 0x02 System is entering S2 sle

Seite 81 - 8.2.7 ACPI/ASL Checkpoint

Page 82 Express-HL 9 Mechanical Information 9.1 Board-to-Board Connectors To allow for different stacking heights, the receptacles for COM Expres

Seite 82 - 9 Mechanical Information

Express-HL Page 83 9.2 Thermal Solution 9.2.1 Heat Spreaders The function of the heat spreader is to ensure an identical mechanical profile for a

Seite 83 - 9.2 Thermal Solution

Page 84 Express-HL Step 4: Use the four M2.5, L=6mm screws provided to fasten the heatsink to the module. Step 5: Place the COM Express modul

Seite 84

Express-HL Page 85 9.3 Mounting Methods There are several standard ways to mount the COM Express module with a thermal solution onto a carrier boa

Seite 85 - 9.3 Mounting Methods

Page 86 Express-HL 9.4 Standoff Types The standoffs available for Top and Bottom mounting methods are shown below. Note that threaded standoffs ar

Seite 86 - 9.4 Standoff Types

Express-HL Page 87 Safety Instructions Read and follow all instructions marked on the product and in the documentation before you operate your syst

Seite 87 - Safety Instructions

Page 88 Express-HL Getting Service ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan Tel:

Seite 88 - Getting Service

Express-HL Page 89 ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +

Seite 89

Express-HL Page 9 2.10 Power Specifications ¾ Power Modes: AT and ATX mode (AT mode start controlled by SEMA) ¾ Standard Voltage Input: ATX

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