Adlink PCI-7256 Bedienungsanleitung PDF herunterladen (Seite 29)

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CH1 Int_EN (bit 10): Write/Read

DI channel 1 interrupt enable control

1 : enable

0 : disable

The following table shows all possible combinations of interrupt source.

Table 3.2 Interrupt source set up

Interurpt type

Bit

IRQ source IRQ trigger condition

Disable 0 0 0 Interrupt disable --

Mode 1 0 0 1 COS interrupt

Change of state in the enabled

channel

Mode 2 0 1 0 Ch.0 interrupt enable Rising edge of DI channel 0

Mode 2 1 0 0 Ch.1 interrupt enable Rising edge of DI channel 1

Mode 2 1 1 0

Ch.0 & 1 interrupt

enable

Rising edge of DI channel 0 or

0 1

1 0

Forbidden

1 1

1 Not allowed (disable) ---

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Adlink PCI-7256 Bedienungsanleitung Seite 29