Adlink CoreModule 435 Bedienungsanleitung PDF herunterladen (Seite 37)

Chapter 3 Hardware

CoreModule 435 Reference Manual 31

Table 3-13 describes the pin signals of the Video interface, which uses a 44-pin, right-angle header with 2

rows, odd/even sequence (1, 2), and 0.079" (2mm) pitch.

Table 3-13. Video Interface Pin Signals (J11)

Pin # Signal Description

1 TFTDClk TFT Shift Clock – This clock signal provides the timing for transferring digital

pixel data.

2 TFTDE TFT Data Enable – This signal indicates valid data on any of the FP [23:0] lines.

3 TFTLine TFT Line Pulse – This signal is the digital monitor equivalent of HSYNC.

4 TFTFrame TFT Frame Marker – This signal is the TFT monitor equivalent of VSYNC.

GND1 Ground 1

GND2 Ground 2

7 NC Not connected (FP0 = Flat Panel Data 0)

8 NC Not connected (FP1 = Flat Panel Data 1)

9 FP2 Flat Panel Data 2 – data output, Blue0 (18-bit)

10 FP3 Flat Panel Data 3 – data output, Blue1 (18-bit)

11 FP4 Flat Panel Data 4 – data output, Blue2 (18-bit)

12 FP5 Flat Panel Data 5 – data output, Blue3 (18-bit)

13 FP6 Flat Panel Data 6 – data output, Blue4 (18-bit)

14 FP7 Flat Panel Data 7 – data output, Blue5 (18-bit)

15 NC Not connected (FP8 = Flat Panel Data 8)

16 NC Not connected (FP9 = Flat Panel Data 9)

17 FP10 Flat Panel Data 10 – data output, Green0 (18-bit)

18 FP11 Flat Panel Data 11 – data output, Green1 (18-bit)

19 FP12 Flat Panel Data 12 – data output, Green2 (18-bit)

20 FP13 Flat Panel Data 13 – data output, Green3 (18-bit)

21 FP14 Flat Panel Data 14 – data output, Green4 (18-bit)

22 FP15 Flat Panel Data 15 – data output, Green5 (18-bit)

23 NC Not connected (FP16 = Flat Panel Data 16)

24 NC Not connected (FP17 = Flat Panel Data 17)

25 FP18 Flat Panel Data 18 – data output, Red0 (18-bit)

26 FP19 Flat Panel Data 19 – data output, Red1 (18-bit)

27 FP20 Flat Panel Data 20 – data output, Red2 (18-bit)

28 FP21 Flat Panel Data 21 – data output, Red3 (18-bit)

29 FP22 Flat Panel Data 22 – data output, Red4 (18-bit)

30 FP23 Flat Panel Data 23 – data output, Red5 (18-bit)

31 TFTEnVcc TFT Power Enable

32 TFTEnVee TFT Backlight Enable

+PNLVdd Panel Voltage (+3.3 or +5 volts ±5%) depending on setting of JP6

+12V Backlight Voltage (+5 or +12 volts ±5%) depending on setting of JP5

GND3 Ground 3

GND4 Ground 4

1 2 ... 32 33 34 35 36 37 38 39 40 41 42 ... 57 58

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