Adlink CoreModule 430 Bedienungsanleitung PDF herunterladen (Seite 48)

Chapter 4 BIOS Setup

42 Reference Manual CoreModule 430

BIOS Chipset Setup Screen

Figure 4-6. BIOS Chipset Setup Screen

NorthBridge Configuration

• NorthBridge Chipset Configuration



DRAM Timing Setting By – [BIOS]



CPU Speed Setting By – [Divide By 1;

Divide By 2;

Divide By 3;

Divide By 4;

Divide By 5;

Divide By 6;

Divide By 7;

Divide By 8]

SouthBridge Configuration

• SouthBridge Chipset Configuration

P.O.S.T. Forward To [Disabled; COM1]



ISA Configuration

• ISA Clock – [8.3MHz; 16.6MHz]

• ISA 16bits I/O wait-state – [1 clock;

2 clock;

3 clock;

4 clock;

5 clock;

6 clock;

7 clock;

8 clock]

BIOS Setup Utility

Advance Chipset Settings

Select Screen

Select Item

Enter Go to Sub Screen

F1 General Help

F10 Save and Exit

ESC Exit

v02.xx (C) Copyright 1985-20xx, American Megatrends, Inc.

NorthBridge Configuration

SouthBridge Configuration

WARNING: Setting wrong values in below sections

may cause system to malfunction.

Main Advanced PCIPnP Boot Security Chipset Exit

CM430_BIOS_ChipsetScreen_a

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